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    SI53311 Price and Stock

    Skyworks Solutions Inc SI53311-B-GM

    IC CLK BUFFER 2:6 1.25GHZ 32QFN
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SI53311-B-GM Tray 1,211 1
    • 1 $6.97
    • 10 $4.737
    • 100 $3.60363
    • 1000 $2.85663
    • 10000 $2.7125
    Buy Now
    Mouser Electronics SI53311-B-GM 4,578
    • 1 $4.65
    • 10 $3.1
    • 100 $2.78
    • 1000 $2.71
    • 10000 $2.71
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    Verical SI53311-B-GM 1,960 490
    • 1 -
    • 10 -
    • 100 -
    • 1000 $4.25
    • 10000 $4.25
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    Richardson RFPD SI53311-B-GM 1,960 1
    • 1 $4.22
    • 10 $4.22
    • 100 $3.37
    • 1000 $2.88
    • 10000 $2.88
    Buy Now

    Skyworks Solutions Inc SI53311-B-GMR

    IC CLK BUFFER 2:6 1.25GHZ 32QFN
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SI53311-B-GMR Reel 1,000
    • 1 -
    • 10 -
    • 100 -
    • 1000 $3.06838
    • 10000 $2.91496
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    Mouser Electronics SI53311-B-GMR
    • 1 -
    • 10 -
    • 100 -
    • 1000 $3.06
    • 10000 $2.91
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    Richardson RFPD SI53311-B-GMR 1
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
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    SI53311 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SI53311-B-GM Silicon Laboratories Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC TRANSLATOR BUFF/LEVEL 32QFN Original PDF
    SI53311-B-GMR Silicon Laboratories Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC TRANSLATOR BUFF/LEVEL 32QFN Original PDF

    SI53311 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    si514

    Abstract: SI510
    Text: AN765 T HERMAL A NALYSIS OF S I L I C O N L ABS T I M I N G D EVICES 1. Introduction The junction temperature of semiconductor devices affects reliability and performance of Integrated Circuits ICs , including timing devices. This application note provides the following:


    Original
    PDF AN765 si514 SI510

    what is slew rate

    Abstract: No abstract text available
    Text: AN766 U NDERSTANDING A N D O PTIMIZING C L O C K B UFFER ’ S A D D IT I V E J ITTER P E R F OR MA N C E 1. Introduction This application note details the various contributions to a clock distribution’s buffer’s additive phase noise performance and how to optimize performance without increasing costs.


    Original
    PDF AN766 what is slew rate

    Si53311

    Abstract: No abstract text available
    Text: S i 5 3 3 11 1:6 L O W J I T T E R U NIVERSAL B UFFER /L EVEL T RANSLATOR WITH 2 : 1 I NPUT M UX <1.25 GH Z Features Ordering Information: See page 25. Applications Q2 Q3 Q3 Q4 Q4 27 26 25 DIVA 1 24 DIVB SFOUTA[1] 2 23 SFOUTB[1] SFOUTA[0] 3 22 SFOUTB[0]


    Original
    PDF 32-QFN Si53311

    rs 422

    Abstract: Si53312
    Text: Si53312 1 : 1 0 L OW J I T T E R U NIVERSAL B U FF E R /L EVEL T RANSLATOR WITH 2 : 1 I NPUT M UX <1.25 GH Z Features Ordering Information: See page 25. Applications Q6 Q6 VDDOB 34 37 35 38 39 DIVA 1 33 DIVB SFOUTA[1] SFOUTA[0] 2 32 3 31 SFOUTB[1] SFOUTB[0]


    Original
    PDF Si53312 44-QFN rs 422