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    Untitled

    Abstract: No abstract text available
    Text: – T H E C H A L L E N G E R I N B U I L D I N G A U T O M A T I O N R E G I N – T H E C H A L L E N G E R I N B U I L D I N G A U T O M A T I O N Box 116, S-428 22 Kållered, Phone: +46 31 720 02 00 [email protected] Sweden Fax: +46 31 720 02 50 www.regin.se


    Original
    S-428 PRODCAT2013 HDT3200 PDF

    Untitled

    Abstract: No abstract text available
    Text: +2 ,-4 /6 CLOCK SYNERGY Clockworks SY10EL38L SY100EL38L GENERATION CHIP SEMICONDUCTOR FEATURES DESCRIPTION 3.3V power supply 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75Ki2 input pull-down resistors


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    SY10EL38L SY100EL38L 75Ki2 SY10/100EL38L T0G13Ã 0001i3Li4 SY10EL38LZC Z20-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: « PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP C V M C O rV SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLìnPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification


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    SY10/100H646 MC10/100H646 TGG13fil IVT01 ------300pF 200pF 100pF PDF

    F100K

    Abstract: SY100S351
    Text: * SYNERGY H E X D F L IP ' F L 0 P SY100S351 S E M IC O N D U C T O R _ DESCRIPTION FEATURES Max. toggle frequency of 700MHz Clock to Q max. of 1200ps min. of -98m A ESD protection of 2000V Ie e Industry standard 100K ECL levels Extended supply voltage option:


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    SY100S351 700MHz 1200ps -98mA F100K SY100S351 D24-1 SY100S351FC F100K PDF

    lena

    Abstract: No abstract text available
    Text: O DUAL ANALOG SYNERGY ADVANCE C O M P A R A T O R W /L A T C H SEMICONDUCTOR FEATURES INF q y f i ]bS SY10E1652 DESCRIPTION The SY10E1652 is functionally compatible with the SY10E1651 and is fabricated using Synergy's proprietary ASSET™ bipolar process. The hysterisis control pin, HYS,


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    SY10E1652 SY10E1652 SY10E1651 16-pin 20-pin 850ps 300ps TGG13 GDD0774 lena PDF

    Untitled

    Abstract: No abstract text available
    Text: * 8-BIT SYNCHRONOUS BINARY UP COUNTER SYNERGY SY10E016 SY100E016 SEMICONDUCTOR FEATURES DESCRIPTION The SY10E016 and SY100E016 are high-speed synchronous, presettable and cascadable 8-bit binary counters designed for use in new, high-performance ECL systems. Architecture and operation are the same as the


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    SY10E016 SY100E016 SY10E016 SY100E016 MC10H016 MECL10KH TGD13Ã 0G0Gb34 PDF

    SY10EL32LZC

    Abstract: 001nF
    Text: *SYNER G Y o m w in c D 2 D IV ID E R SEM IC O N D U C TO R FEATURES DESCRIPTION 3.3V power supply 51 Ops propagation delay 3.0GHz toggle frequency High bandwidth output translstions Internal 75KH Input pull-down resistors ESD protection of 2000V The SY10EL/100EL32L are integrated +2 dividers. The


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    SY10EL32L SY100EL32L SY1OEL/100EL32L EL32L SY10EL32LZC SY100EL32LZC R0013Ã 001nF PDF

    HOTD

    Abstract: 256as counting MC10H016 SY100E016 SY10E016 HIGH FREQUENCY COUNTER
    Text: * SYNERGY S E M IC O N D U C T O R 8-BIT SYNCHRONOUS BINARY UP COUNTER FEATURES • ■ ■ ■ ■ ■ ■ SY10E016 SY100E016 D E S C R IP T IO N The SY10E016 and SY100E016 are high-speed synchronous, presettable and cascadable 8-bit binary counters designed for use in new, high-performance ECL


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    SY10E016 SY100E016 700MHz MC10E/100E016 SY100E016 SY10E016 32-Blt TDD13Ã HOTD 256as counting MC10H016 HIGH FREQUENCY COUNTER PDF

    ET 8211

    Abstract: tvccd 20 band equalizer twisted pair cable with parameter
    Text: »es* SYNERGY A STS'3 ADAPT,VE EQUALIZER P R E L 'sY 6 7 6 7 2 SEMICONDUCTOR FEATURES DESCRIPTION • Adaptive Equalizer with Line Compensation Loop Control ■ Compiles with ATM Forum STS-3 Twisted Pair Specifications ■ Transmitter output disable option for quiet line


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    32-pin ML6672 100BASE-TX) SY67672 SY67672 10jiF SY67672CQ SY67672CH ET 8211 tvccd 20 band equalizer twisted pair cable with parameter PDF

    HP70004A

    Abstract: HP53132A OV 5642 70874B
    Text: * SONET/SDH/ATM OC-3 CLOCK RECOVERING TRANSCEIVER SYNERGY SEM IC O N D UC TO R FEATURES DESCRIPTION • A complete SONET/SDH Transmitter & Receiver ■ Complies with Bellcore, CCITT and ANSI Specifications ■ Two on-chip PLLs: One for clock generation & another for clock recovery


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    SY69411 52Mbit/sec 44MHz 84MHz 100-pln SY69411 TQ013fll WAC-013-B HP70004A HP53132A OV 5642 70874B PDF

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY PRELIMINARY SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SEMICONDUCTOR DESCRIPTION FEATURES • 475ps propagation delay The SY10EL/100EL51 are differential clock D flip-flops with reset. These devices are functionally similar to the E151 devices, with higher performance capabilities. With


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    SY10EL51 SY100EL51 475ps SY10EL/100EL51 SY10EL51ZC SY100EL51ZC TGG13Ã PDF

    Untitled

    Abstract: No abstract text available
    Text: « LOW-POWER OCTAL ECL/TTL BI-DIRECTIONAL TRANSLATOR C V M C D ^V SYNERGY SEMICONDUCTOR PRELIMINARY syioos329 W |T H R E g i s T E R FEATURES DESCRIPTION • Bi-directional translation ■ ESD protection of 2000V ■ ECL high impedance outputs ■ Registered outputs


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    syioos329 SY100S329DC SY100S329FC D24-1 F24-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: * SYNERGY H E X D F L IP ' F L 0 P SY100S351 SEMICONDUCTOR DESCRIPTION FEATURES Max. toggle frequency of 700MHz Clock to Q max. of 1200ps Ie e min. of -98mA ESD protection of 2000V Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V


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    SY100S351 700MHz 1200ps -98mA F100K SY100S351DC D24-1 SY100S351FC F24-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: * SYNERGY SEMICONDUCTOR DUAL PHASE LOCKED LOOP DESCRIPTION FEATURES • 1.12GHz maximum VCO frequency ■ 30 to 560MHz reference input operating frequency ■ Frequency doubler mode ■ Low jitter design ■ PECL differential outputs ■ PECL and TTL reference voltages available


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    SY89420 12GHz 560MHz SY89420 0G01SM4 50MHz 100MHz 50MHz PDF

    SY69612

    Abstract: HP 85700A HP53132A
    Text: * SONET/SDH/ATM OC-12 TRANSCEIVER SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY INFORMATION SY69612 DESCRIPTION A complete SONET/SDH Transmitter & Receiver Complies with Bellcore, CCiTT and ANSI specifications On-chip PLL for clock generation SONET framing defeatable


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    OC-12 SY69612 SY69612 OC-12 84MHz 44MHz) SY87612, STS-12/OC-12 HP 85700A HP53132A PDF