Untitled
Abstract: No abstract text available
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.6 April 17, 2013 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
|
Untitled
Abstract: No abstract text available
Text: 7 Series FPGAs Clocking Resources User Guide UG472 v1.8 August 7, 2013 The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
|
Original
|
PDF
|
UG472
5x36K
DSP48
XC7A200T
|
UG480
Abstract: No abstract text available
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics Product Specification DS181 v1.6 April 17, 2013 Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
UG480
|
XC7V2000T
Abstract: FFG1157 XC7A200T XC7V2000T PCIE FFG1930 kintex 7 Artix-7 XC7V585T FLG1926 XC7A100T
Text: LogiCORE IP 7 Series FPGAs Integrated Block v1.4 for PCI Express DS821 April 24, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP 7 Series FPGAs Integrated Block for PCI Express core is a high-bandwidth, scalable, and reliable serial interconnect building block for use
|
Original
|
PDF
|
DS821
XC7V2000T
FFG1157
XC7A200T
XC7V2000T PCIE
FFG1930
kintex 7
Artix-7
XC7V585T
FLG1926
XC7A100T
|
X485T
Abstract: AMBA AXI4 verilog code axi wrapper
Text: Xilinx Design Tools: Release Notes Guide Vivado Design Suite and ISE Design Suite UG631 v2012.2, v14.2 July 25, 2012 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum
|
Original
|
PDF
|
UG631
v2012
X485T
AMBA AXI4 verilog code
axi wrapper
|
SiP12107
Abstract: SiC403A SiP12108 SiP12109
Text: VISHAY SILICONIX www.vishay.com Power ICs Application Note FPGA Power Supply Considerations by Owain Bryant ABSTRACT An FPGA is a device that offers many logic elements - up to 1 million gates in a single device at this writing - as well as other functionality such as transceivers, PLLs, and MAC units for complex processing. FPGAs are becoming very powerful, and the
|
Original
|
PDF
|
SiC401A/B
SiC402A/B
SiC403A/B
SiP12107
05-Mar-13
SiC403A
SiP12108
SiP12109
|
XC6SLX16-CSG324
Abstract: XC6SLX16CSG324 uart 16550 HOLDING UART16550 16550 uart timing XC7K410TFFG676-3
Text: LogiCORE IP AXI UART 16550 v1.01a DS748 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the AMBA (Advance Microcontroller Bus Architecture) AXI (Advanced
|
Original
|
PDF
|
DS748
PC16550D
PC165otify
XC6SLX16-CSG324
XC6SLX16CSG324
uart 16550
HOLDING
UART16550
16550 uart timing
XC7K410TFFG676-3
|
xq7a200t
Abstract: XC7A50T XC7A35T D 105 A062-130
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.13 May 13, 2014 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
xq7a200t
XC7A50T
XC7A35T
D 105 A062-130
|
XC7A50T
Abstract: CPG236 xc7a100tcsg324 XC7A30T XC7A100T XC7A200T-FBG484 XC7A8 XC7A15 XC7A200T XC7A200
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.1 November 7, 2011 Advance Product Specification Artix-7 FPGA Electrical Characteristics Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L
|
Original
|
PDF
|
DS181
XC7A50T
CPG236
xc7a100tcsg324
XC7A30T
XC7A100T
XC7A200T-FBG484
XC7A8
XC7A15
XC7A200T
XC7A200
|
7 Series FPGAs GTP Transceivers User Guide, UG482 v1.5
Abstract: No abstract text available
Text: 7 Series FPGAs GTP Transceivers User Guide UG482 v1.6 August 28, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available “AS IS” and with all faults, Xilinx hereby DISCLAIMS ALL
|
Original
|
PDF
|
UG482
7 Series FPGAs GTP Transceivers User Guide, UG482 v1.5
|
FBG676
Abstract: FFG1156
Text: 7 Series FPGAs Packaging and Pinout Product Specification UG475 v1.9 February 14, 2013 The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
|
Original
|
PDF
|
UG475
FBG676
FFG1156
|
RAMB36E1
Abstract: RAMB18E1
Text: 7 Series FPGAs Memory Resources User Guide UG473 v1.9 October 2, 2013 The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
|
Original
|
PDF
|
UG473
64-bit
72-bit
RAMB36E1
RAMB18E1
|
g17g2
Abstract: state machine axi 3 protocol state machine diagram for axi bridge state machine axi DS712 G17G-2 AMBA AXI specifications 17256 XILINX
Text: LogiCORE IP AXI PLBv46 Bridge v2.02.a DS712 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Advanced Microcontroller Bus Architecture (AMBA ) Advanced eXtensible Interface (AXI4) to Processor Local Bus (PLB v4.6) Bridge translates AXI
|
Original
|
PDF
|
PLBv46
DS712
32/64-bit
ZynqTM-7000
g17g2
state machine axi 3 protocol
state machine diagram for axi bridge
state machine axi
G17G-2
AMBA AXI specifications
17256 XILINX
|
xc7a100tcsg324
Abstract: XC7A200T-FBG484 XC6SLX16CSG324 Xilinx ISE Design Suite 14.2 XC6SLX45-FGG484 XC6SLX100-FGG676 XC6SLX16-CSG324 XC6SLX45-CSG324 XC6SLX9CSG324 XC6SLX45-CSG484
Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 July 25, 2012 Product Specification v3.167 & v4.17 Features LogiCORE IP Facts • Fully compatible 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution
|
Original
|
PDF
|
64-Bit
DS205
64-bit,
xc7a100tcsg324
XC7A200T-FBG484
XC6SLX16CSG324
Xilinx ISE Design Suite 14.2
XC6SLX45-FGG484
XC6SLX100-FGG676
XC6SLX16-CSG324
XC6SLX45-CSG324
XC6SLX9CSG324
XC6SLX45-CSG484
|
|
XC7VX690T
Abstract: XC7VX485T XC7VX690 XC7V2000T XC7A200 XC7VH580T FHG1761 hp2300 FLG1925 FFG1930
Text: 15 7 Series FPGAs Overview DS180 v1.11 May 5, 2012 Advance Product Specification General Description Xilinx 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most
|
Original
|
PDF
|
DS180
XC7VX690T
XC7VX485T
XC7VX690
XC7V2000T
XC7A200
XC7VH580T
FHG1761
hp2300
FLG1925
FFG1930
|
UG470
Abstract: No abstract text available
Text: 7 Series FPGAs Configuration User Guide UG470 v1.6 January 2, 2013 The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
|
Original
|
PDF
|
UG470
UG470
|
XC7V2000TFLG1925
Abstract: XC7V2000T-FLG1925-1 XC7K480T-FFG1156-1 XC6SLX150T-FGG900 Artix-7 FFG1156 xc5vlx XC6VLX760-FF1760-1 XILINX/fifo generator xilinx spartan
Text: LogiCORE IP FIFO Generator v9.1 DS317 April 24, 2012 Product Specification Introduction The Xilinx LogiCORE IP FIFO Generator is a fully verified first-in first-out FIFO memory queue for applications requiring in-order storage and retrieval. The core provides an optimized solution for all FIFO
|
Original
|
PDF
|
DS317
XC7V2000TFLG1925
XC7V2000T-FLG1925-1
XC7K480T-FFG1156-1
XC6SLX150T-FGG900
Artix-7
FFG1156
xc5vlx
XC6VLX760-FF1760-1
XILINX/fifo generator xilinx spartan
|
XC7K325T
Abstract: XC7VX485T XC7VH870T XC7VX690T xc7a200t XC7V2000T FLG1925 XC7VH580T CPG236 XC7A100T
Text: 15 7 Series FPGAs Overview DS180 v1.8 September 13, 2011 Advance Product Specification General Description Xilinx 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form
|
Original
|
PDF
|
DS180
XC7K325T
XC7VX485T
XC7VH870T
XC7VX690T
xc7a200t
XC7V2000T
FLG1925
XC7VH580T
CPG236
XC7A100T
|
XC7A50T
Abstract: CSG325
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.12 March 28, 2014 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
XC7A50T
CSG325
|
AMBA AXI4 stream specifications
Abstract: state machine axi 3 protocol state machine axi Xilinx ISE Design Suite
Text: LogiCORE IP AXI Slave Burst v1.00b DS769 October 16, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AXI Slave Burst core provides an interface between the AXI4 memory-mapped interface and the IP interconnect interface. This core is designed
|
Original
|
PDF
|
DS769
PLBv46
ZynqTM-7000
AMBA AXI4 stream specifications
state machine axi 3 protocol
state machine axi
Xilinx ISE Design Suite
|
XC7A100T
Abstract: XC7A200T Artix-7 xc7a350t 024AC by460 513 gb 173 XC7A200 2L250 SSTL12
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.4 September 20, 2012 Advance Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
XC7A100T
XC7A200T
Artix-7
xc7a350t
024AC
by460
513 gb 173
XC7A200
2L250
SSTL12
|
XC6VLX130T-1FF1156
Abstract: XILINX FIFO UART uart 19200 ise one stop bit XC6VLX130T-1-FF1156 FF1156 fgg484 Xilinx ISE Design Suite 14.2 XC7K410TFFG676-3 XC6VLX130T block diagram UART using VHDL
Text: LogiCORE IP AXI UART Lite v1.02a DS741 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AXI Universal Asynchronous Receiver Transmitter (UART) Lite interface connects to the Advanced Microcontroller Bus Architecture
|
Original
|
PDF
|
DS741
ZynqTM-7000
XC6VLX130T-1FF1156
XILINX FIFO UART
uart 19200 ise one stop bit
XC6VLX130T-1-FF1156
FF1156
fgg484
Xilinx ISE Design Suite 14.2
XC7K410TFFG676-3
XC6VLX130T
block diagram UART using VHDL
|
state machine axi 3 protocol
Abstract: XC6VLX130TFF1156 state machine axi state machine diagram for axi bridge xc6vlx130tff1156-1 axi4 DS827 XC6VLX130T-FF1156-1 AMBA AHB bus protocol CSAX
Text: LogiCORE IP AXI to AHB-Lite Bridge v1.01a DS827 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The AMBA (Advanced Microcontroller Bus Architecture) AXI (Advanced eXtensible Interface) to AHB-Lite (Advanced High Performance Bus) Bridge
|
Original
|
PDF
|
DS827
ZynqTM-7000
state machine axi 3 protocol
XC6VLX130TFF1156
state machine axi
state machine diagram for axi bridge
xc6vlx130tff1156-1
axi4
XC6VLX130T-FF1156-1
AMBA AHB bus protocol
CSAX
|
XC7A200T
Abstract: UG475 XC7A100T SSTL12
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.3 June 1, 2012 Advance Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
|
Original
|
PDF
|
DS181
XC7A200T
UG475
XC7A100T
SSTL12
|